Controllers are utilized in many, if not all, complex computerized systems. Typically, these controllers take the form of known processors, or the like, for controlling the sequential operation of those components or devices which are in communication with the controller.
In such systems, it is oftentimes necessary for large amounts of data to be processed, searched or otherwise manipulated in short timeframes. Typically, the speed at which these operations are executed can be increased by configuring the overall system such that the controlled components each operate in parallel with one another. That is, instructions from the controller in such systems are carried out by the various components of the system in parallel every cycle, thus saving time and increasing the efficiency of the system.
There exists, however, certain inherent inefficiencies in the operation of known processor-controlled systems. Perhaps most significantly, known processor-controlled systems exhibit significant ‘down-time’ when required to not only issue instructions to those components connected in parallel, but also to execute basic routines within the controller itself. That is, known processor-controlled systems are incapable of executing operations within themselves while also seeing to the parallel execution of instructions in their integrated components, all within a common time-frame.
With the forgoing problems and concerns in mind, the present invention therefore seeks to utilize a data processing system having a new type of controller termed a Cartesian Controller (CC) which is capable of issuing instructions for the parallel execution of these instructions in controlled devices, as well as performing operations within itself, all within a single clock cycle.